Techniniai dokumentai
Specifikacijos
Markė
NexperiaLogic Family
74HC
Logic Function
D Type
Input Type
CMOS
Output Type
Push-Pull
Output Signal Type
Single Ended
Triggering Type
Positive Edge
Polarity
Non-Inverting
Tvirtinimo tipas
Surface Mount
Pakuotės tipas
TSSOP
Kaiščių skaičius
20
Set/Reset
Yes
Number of Elements per Chip
8
Maximum Propagation Delay Time @ Maximum CL
225ns
Matmenys
6.6 x 4.5 x 0.95mm
Maximum Operating Supply Voltage
6 V
Plotis
4.5mm
Minimali darbinė temperatūra
-40 °C
Minimum Operating Supply Voltage
2 V
Aukštis
0.95mm
Maksimali darbinė temperatūra
+125 °C
Propagation Delay Test Condition
50pF
Ilgis
6.6mm
Kilmės šalis
Philippines
Produkto aprašymas
74HC Family Flip-Flops & Latches, Nexperia
A range of NXP Flip-Flops and Latches from the 74HC Family of CMOS Logic ICs. The 74HC Family use silicon gate CMOS technology to achieve operating speeds similar to the LSTTL family but with the low power consumption of standard CMOS integrated circuits.
74HC Family
Sandėlio informacija laikinai nepasiekiama.
Patikrinkite dar kartą.
€ 0,52
Each (In a Tube of 75) (be PVM)
€ 0,629
Each (In a Tube of 75) (su PVM)
75
€ 0,52
Each (In a Tube of 75) (be PVM)
€ 0,629
Each (In a Tube of 75) (su PVM)
75
Techniniai dokumentai
Specifikacijos
Markė
NexperiaLogic Family
74HC
Logic Function
D Type
Input Type
CMOS
Output Type
Push-Pull
Output Signal Type
Single Ended
Triggering Type
Positive Edge
Polarity
Non-Inverting
Tvirtinimo tipas
Surface Mount
Pakuotės tipas
TSSOP
Kaiščių skaičius
20
Set/Reset
Yes
Number of Elements per Chip
8
Maximum Propagation Delay Time @ Maximum CL
225ns
Matmenys
6.6 x 4.5 x 0.95mm
Maximum Operating Supply Voltage
6 V
Plotis
4.5mm
Minimali darbinė temperatūra
-40 °C
Minimum Operating Supply Voltage
2 V
Aukštis
0.95mm
Maksimali darbinė temperatūra
+125 °C
Propagation Delay Test Condition
50pF
Ilgis
6.6mm
Kilmės šalis
Philippines
Produkto aprašymas
74HC Family Flip-Flops & Latches, Nexperia
A range of NXP Flip-Flops and Latches from the 74HC Family of CMOS Logic ICs. The 74HC Family use silicon gate CMOS technology to achieve operating speeds similar to the LSTTL family but with the low power consumption of standard CMOS integrated circuits.