Technical Document
Specifications
Brand
Texas InstrumentsMounting Type
Surface Mount
Package Type
TSSOP
Pin Count
16
Dimensions
5 x 4.4 x 1.15mm
Maximum Operating Supply Voltage
3.6 V
Maximum Operating Temperature
+85 °C
Minimum Operating Temperature
-40 °C
Minimum Operating Supply Voltage
1.65 V
Product details
74LVC Family Decoders/Multiplexers, Texas Instruments
Texas Instruments range of Decoders, Multiplexers and De-multiplexers from the 74LVC Family of Low-voltage CMOS Logic ICs. The 74LVC Family use silicon gate CMOS technology and is designed to operate at 3.3V, allowing a significant reduction in power consumption when compared to 5V systems.
Operating Voltage: 1.65 to 3.6V
5V tolerant inputs
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 250 mA per JESD 17
ESD protection exceeds JESD 22
74LVC Family
€ 11.02
€ 0.22 Each (Supplied on a Reel) (Exc. Vat)
€ 13.33
€ 0.266 Each (Supplied on a Reel) (inc. VAT)
Production pack (Reel)
50

€ 11.02
€ 0.22 Each (Supplied on a Reel) (Exc. Vat)
€ 13.33
€ 0.266 Each (Supplied on a Reel) (inc. VAT)
Production pack (Reel)
50

Stock information temporarily unavailable.
Please check again later.
Quantity | Unit price | Per Reel |
---|---|---|
50 - 190 | € 0.22 | € 2.20 |
200 - 490 | € 0.198 | € 1.98 |
500+ | € 0.17 | € 1.70 |
Technical Document
Specifications
Brand
Texas InstrumentsMounting Type
Surface Mount
Package Type
TSSOP
Pin Count
16
Dimensions
5 x 4.4 x 1.15mm
Maximum Operating Supply Voltage
3.6 V
Maximum Operating Temperature
+85 °C
Minimum Operating Temperature
-40 °C
Minimum Operating Supply Voltage
1.65 V
Product details
74LVC Family Decoders/Multiplexers, Texas Instruments
Texas Instruments range of Decoders, Multiplexers and De-multiplexers from the 74LVC Family of Low-voltage CMOS Logic ICs. The 74LVC Family use silicon gate CMOS technology and is designed to operate at 3.3V, allowing a significant reduction in power consumption when compared to 5V systems.
Operating Voltage: 1.65 to 3.6V
5V tolerant inputs
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 250 mA per JESD 17
ESD protection exceeds JESD 22