Techniniai dokumentai
Specifikacijos
Markė
MicrochipMemory Size
256kbit
Interface Type
Serial-SPI
Pakuotės tipas
SOIC
Tvirtinimo tipas
Surface Mount
Kaiščių skaičius
8
Organisation
32K x 8 bit
Minimum Operating Supply Voltage
2.5 V
Maximum Operating Supply Voltage
5.5 V
Programming Voltage
2.5 → 5.5V
Number of Bits per Word
8bit
Matmenys
4.9 x 3.9 x 1.25mm
Number of Words
32K
Minimali darbinė temperatūra
-40 °C
Maksimali darbinė temperatūra
+85 °C
Maximum Random Access Time
50ns
Data Retention
200yr
Produkto aprašymas
25AA256/25LC256 SPI Serial EEPROM
Microchips 25AA256/25LC256 family of devices are 256 Kbit SPI Serial EEPROMs available in a variety of package, temperature and power supply variants.
The Serial Peripheral Interface (SPI) is utilised to provide the required Clock Input (SCK), Data In (SI) and Data Out (SO) signals. The operation of these devices can be paused via a Hold pin (HOLD) which causes inputs to be ignored with the exception higher priority interrupts defined via the Chip Select (CS) pin.
EEPROM Serial Access - Microchip
€ 161,50
€ 1,615 Each (In a Tube of 100) (be PVM)
€ 195,42
€ 1,954 Each (In a Tube of 100) (su PVM)
100

€ 161,50
€ 1,615 Each (In a Tube of 100) (be PVM)
€ 195,42
€ 1,954 Each (In a Tube of 100) (su PVM)
100

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Patikrinkite dar kartą.
Techniniai dokumentai
Specifikacijos
Markė
MicrochipMemory Size
256kbit
Interface Type
Serial-SPI
Pakuotės tipas
SOIC
Tvirtinimo tipas
Surface Mount
Kaiščių skaičius
8
Organisation
32K x 8 bit
Minimum Operating Supply Voltage
2.5 V
Maximum Operating Supply Voltage
5.5 V
Programming Voltage
2.5 → 5.5V
Number of Bits per Word
8bit
Matmenys
4.9 x 3.9 x 1.25mm
Number of Words
32K
Minimali darbinė temperatūra
-40 °C
Maksimali darbinė temperatūra
+85 °C
Maximum Random Access Time
50ns
Data Retention
200yr
Produkto aprašymas
25AA256/25LC256 SPI Serial EEPROM
Microchips 25AA256/25LC256 family of devices are 256 Kbit SPI Serial EEPROMs available in a variety of package, temperature and power supply variants.
The Serial Peripheral Interface (SPI) is utilised to provide the required Clock Input (SCK), Data In (SI) and Data Out (SO) signals. The operation of these devices can be paused via a Hold pin (HOLD) which causes inputs to be ignored with the exception higher priority interrupts defined via the Chip Select (CS) pin.